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This work presents a novel power amplifier (PA) architecture employing a feedforward-like loop structure for the linearization of a load-modulated PA. The load-modulating loop combiner (LMLC) is related to a feedforward amplifier, but with the interaction between the main and auxiliary amplifiers to generate both distortion cancellation and load modulation. A brief overview of the underlying theory is presented, followed by a hardware demonstrator operating at 3.5 GHz with 42-dBm peak output power and 55% peak drain efficiency in CW. When excited by a 100-MHz LTE signal, it maintains a 3-ppt EVM improvement and a 2–5-ppt average drain efficiency improvement compared to its standalone main amplifier. 

The challenges associated with efficiently and effectively linearizing a nonlinear power amplifier (PA) over wide signal bandwidths are increasingly important to the design of 5G front-ends. Conventional digital linearization techniques are limited by absolute bandwidth, while the RF-domain nonlinear PA typically exhibits consistent fractional bandwidth even as the carrier frequency is increased. Therefore, RF-domain design techniques, like those focusing on bias-line impedance selection, are critical for overall distortion reduction. To evaluate bias-line effects, a demonstrator PA is here investigated over a range of Class-AB biases and over a range of drain inductance values. The characterization under two-tone and LTE-like modulated excitations with 10-MHz and 100-MHz instantaneous bandwidth shows that the conventional linear-efficiency trade-off in bias design does not necessarily hold true for wide instantaneous bandwidths. Additionally, techniques to synthesize a negative baseband impedance using low frequency feedback are discussed. 

This work presents a power amplifier (PA) linearization approach based on baseband feedback. The modulated signal envelope is fed back from the transistor's drain to its gate with an applied amplitude and phase shift selected to reduce the intermodulation distortion (IMD3) product at the output. The design targets IMD3 improvement near the PA's 1-dB compression point (P1dB), enabling linear operation at a higher output power level and therefore improved device periphery utilization and efficiency. This approach offers a potential linearization alternative to digital pre-distortion, which cannot be applied in some systems, without affecting the RF performance. The 850-MHz proof-of-concept prototype based on a 15-W GaN device is characterized with a two-tone measurement with 5-MHz spacing, and demonstrates 9-dB improvement of the lower IMD3 tone near the P1dB point.